Code Optimization Techniques for Embedded Processors: Methods, Algorithms, and Tools [Hardcover]

Rainer Leupers (Author)

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Product Details

Hardcover: 224 pages
Publisher: Springer; 1 edition (Oct 31 2000)
Language: English
ISBN-10: 0792379896
ISBN-13: 978-0792379898
Product Dimensions: 23.4 x 15.6 x 1.6 cm
Shipping Weight: 431 g

Average Customer Review: 3.0 out of 5 stars See all reviews (1 customer review)

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Product Description

The building blocks of today's embedded systems-on-a-chip are complex IP components and programmable processor cores. This means that more and more system functionality is implemented in software rather than in custom hardware. In turn, this indicates a growing need for high-level language compilers, capable of generating efficient code for embedded processors. However, traditional compiler technology hardly keeps pace with new developments in embedded processor architectures. Many existing compilers for DSPs and multimedia processors therefore produce code of insufficient quality with respect to performance and/or code size, and a large part of software for embedded systems is still being developed in assembly languages. As both embedded software as well as processors architectures are getting more and more complex, assembly programming clearly violates the demands for a short time-to-market and high dependability in embedded system design. The goal of this book is to provide new methods and techniques to software and compiler developers, that help to make the necessary step from assembly programming to the use of compilers also in embedded system design. Code Optimization Techniques for Embedded Processors discusses the state-of-the-art in the area of compilers for embedded processors. It presents a collection of new code optimization techniques, dedicated to DSP and multimedia processors. These include: compiler support for DSP address generation units, efficient mapping of data flow graphs to irregular architectures, exploitation of SIMD and conditional instructions, as well as function inlining under code size constraints. Comprehensive experimental evaluations are given for real-life processors, that indicate the code quality improvements which can be achieved as compared to earlier techniques. In addition, C compiler frontend issues are discussed from a practical viewpoint. Code Optimization Techniques for Embedded Processors is intended for researchers and engineers active in software development for embedded systems, and for compiler developers in academia and industry.

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First Sentence
According to the 1998 SIA roadmap [SIA98], integrated circuits (ICs) at the end of this decade will typically have more than 500 million transistors, an integration scale more than one order of magnitude higher than in today's microelectronics. Read the first page

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3.0 out of 5 stars Code Optimization Techniques for Embedded Processors, Feb 20 2002

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This review is from: Code Optimization Techniques for Embedded Processors: Methods, Algorithms, and Tools (Hardcover)

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