Fault-Tolerance Techniques for SRAM-Based FPGAs [Paperback]

Fernanda Lima Kastensmidt (Author), Ricardo Reis (Author)

List Price:	CDN$ 214.95
Price:	CDN$ 137.79 & this item ships for FREE with Super Saver Shipping. Details
You Save:	CDN$ 77.16 (36%)
	o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o

Usually ships within 2 to 5 weeks.
Ships from and sold by Amazon.ca. Gift-wrap available.

Formats	Amazon Price		New from	Used from
Hardcover	CDN $144.17		--	--
Paperback	CDN $137.79		--	--

Product Details

Paperback: 198 pages
Publisher: Springer; Softcover reprint of hardcover 1st ed. 2006 edition (Nov 29 2010)
Language: English
ISBN-10: 1441940529
ISBN-13: 978-1441940520
Product Dimensions: 22.9 x 15.2 x 1.2 cm
Shipping Weight: 327 g

Would you like to update product info or give feedback on images?

See Complete Table of Contents

Product Description

This book reviews fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs), outlining many methods for designing fault tolerance systems. Some of these are based on new fault-tolerant architecture, and others on protecting the high-level hardware description before synthesis in the FPGA. The text helps the reader choose the best techniques project-by-project, and to compare fault tolerant techniques for programmable logic applications.

Inside This Book (Learn More)
Browse and search another edition of this book.

Browse Sample Pages
Front Cover | Copyright | Table of Contents | Excerpt | Back Cover