- Hardcover: 416 pages
- Publisher: Prentice Hall; 1 edition (Sept. 25 2003)
- Language: English
- ISBN-10: 0131413090
- ISBN-13: 978-0131413092
- Product Dimensions: 17 x 2.3 x 23.9 cm
- Shipping Weight: 658 g
- Average Customer Review: Be the first to review this item
Amazon Bestsellers Rank:
#3,447,550 in Books (See Top 100 in Books)
- #595 in Books > Computers & Technology > Computer Science > Software Engineering > Design Tools & Techniques
- #6373 in Books > Professional & Technical > Engineering > Electrical & Electronics > Electronics
- #7348 in Books > Professional & Technical > Engineering > Electrical & Electronics > Electricity Principles
Design Verification with e Hardcover – Sep 25 2003
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From the Inside Flap
During my earliest experience with e, I was looking for a book that could give me a "jumpstart" on using e. I wanted to learn basic digital verification paradigms and the necessary econstructs that would help me verify small digital designs. After I had gained some experiencewith building basic e verification environments, I wanted to learn to use e to verify largedesigns. At that time I was searching for a book that broadly discussed advanced e-based designverification concepts and real design verification methodologies. Finally, when I had gainedenough experience with design verification of many multi-million gate chips using e, I felt theneed for an e book that would act as a handy reference. I realized that my needs were differentat different stages of my design verification maturity. A desire to fill these needs has led tothe publication of this book.
Rapid changes have occurred during the past few years. High Level Verification Languages(HVLs) such as e have become a necessity for verification environments. I have seenstate-of-the-art verification methodologies and tools evolve to a high level of maturity. Ihave also applied these verification methodologies to a wide variety of multi-million gateASICs that I have successfully completed during this period. I hope to use these experiences tomake this edition a richer learning experience for the reader.
This book emphasizes breadth rather than depth. The book imparts to the reader a workingknowledge of a broad variety of e-based topics, thus giving the reader a global understandingof e-based design verification. The book leaves the in-depth coverage of each topic to thereference manuals and usage guides for e.
This book should be classified not only as an e book but, more generally, as a designverification book. It important to realize that e is only a tool used in design verification.It is the means to an end--the digital IC chip. Therefore, this book stresses the practicalverification perspective more than the mere language aspects of e. With HVL-based designverification having become a necessity, no verification engineer can afford to ignore popularHVLs such as e.
Currently, Specman Elite by Verisity Design, Inc., is the only tool that supports e.However, the powerful constructs that e provides for design verification make it an excellentHVL. Because of its popularity, it is likely that e will be standardized in the future andmultiple vendors will create tools to support e. Therefore, in this book, although SpecmanElite is used as a reference tool, the treatment of e is done in a tool-independent manner. econcepts introduced in this book will be generally applicable in the future regardless of thetool that is used.Who Should Use This Book
This book is intended primarily for beginners and intermediate-level e users. However, foradvanced e users, the broad coverage of topics makes it an excellent reference book to be usedin conjunction with the manuals and training materials of e-based products.
The book presents a logical progression of e-based topics. It starts with the basics, suchas functional verification methodologies, and e fundamentals, and then it gradually builds onto bigger examples and eventually reaches advanced topics, such as coverage-driven functionalverification, reusable verification components, and C/C++ Interface. Thus, the book is usefulto e users with varying levels of expertise as explained below.Students in verification courses at universities
Parts 1, 2, and 3 of this book are ideal for a foundation semester course in e-based designverification. Students are exposed to functional verification methodologies and e basics, and,finally, they build a complete verification system with e.New e users in the industry
Companies are rapidly moving to e-based verification. Parts 1, 2, and 3 of this bookconstitute a perfect jump start for engineers who want to orient their skills toward HVL-basedverification.Basic e users who need to understand advanced concepts
Part 4 of this book discusses advanced concepts such as coverage-driven functionalverification, reusable verification components, and C/C++ Interface. A complete verificationsystem example is discussed in Part 3. These topics are necessary to graduate from smaller tolarger e-based verification environments.e Experts
Many e topics are covered, from the e basics to advanced topics like coverage-drivenfunctional verification, reusable verification components, and C/C++ Interface. Plenty ofexamples are provided. A complete verification system example is discussed in Part 3. For eexperts, this book is a handy guide to be used along with the reference manuals.How This Book is Organized
This book is organized into five parts.
Part 1, Introduction, presents the basic concepts of functional verification to the user.It also explains why it is important to maximize verification productivity and themethodologies used to successfully verify a digital ASIC. Finally, it discusses how anenvironment can be modeled using e for effective verification. Part 1 contains two chapters.
Part 2, e Basics, discusses the e syntax necessary to build a complete verification system.Topics covered are basics such as struct/units, generation, procedural flow control, timeconsuming methods, temporal expressions, checking, and coverage. This section ends with achapter that puts together all the basic concepts and explains how to run a complete simulationwith an e-based environment. Part 2 contains nine chapters.
Part 3, Creating a Complete Verification System with e, takes the reader through thecomplete verification process of a simple router design. Topics discussed are designspecification, verification components, verification plan and test plan. The section ends withan explanation of the actual e code for each component required for the verification of therouter design. Part 3 contains two chapters.
Part 4, Advanced Verification Techniques with e, discusses important advanced concepts suchas coverage driven functional verification, reusable verification components (eVCs) andintegration with C/C++. Part 4 contains three chapters.
Part 5, Appendices, discusses important additional topics such as the e Quick Reference Guideand interesting e Tidbits. Part 5 contains two appendices.
From the Back Cover
Design Verification with e Samir Palnitkar
Written for both experienced and new users, DesignVerification with e gives you a broadcoverage of e . It stresses the practical verification perspective of e rather than emphasizing only itslanguage aspects.
- Introduces you to e-based verification methodologies
- Describes e syntax in detail, including structs, units, methods, events, temporal expressions. and TCMs
- Explains the concepts of automatic generation, checking and coverage
- Discusses the e Reuse Methodology
- Describes essential topics such as coverage driven verification, e verification components (eVCs), and interfacing with C/C++
- Illustrates a complete verification example in e
- Contains a quick-reference guide to the e language
- Offers many practical verification tips
Includes over 250 illustrations, examples, andexercises, and a verification resource list. Learning objectives and summariesare provided for each chapter.
“Mr. Palnitkar illustrates how and why the power ofthe e verification language and the underlying Specman Elite testbench automationtool are used to develop today's most advanced verification environments. Thisbook is valuable to both the novice and the experienced e user. I highlyrecommend it to anyone exploring functional verification”
Chief Executive Officer
Verisity Design, Inc.
“This book demonstrates how e can be used to createstate-of-the-art verification environments. An ideal book to jumpstarta beginner and a handy reference for experts”
“The book gives a simple, logical, and well-organizedpresentation of e with plenty of illustrations. This makes it an ideal text book for universitycourses on functional verification”
—Dr. Steven Levitan
Department of Electrical Engineering
University of Pittsburgh, Pittsburgh, PA
“This book is ideal for readers with little or no e programming experience. It gives the reader athorough and practical understanding of not only the e language, but also how to effectively use thislanguage to develop complex functional verification environments.”
ST Microelectronics, Inc.
“The flow of the book is logical and gradual. Plentyof illustrations and examples makes this an ideal book for e users. A must-have for both beginners andexperts”
Sun Microsystems, Inc.
UpperSaddle River, NJ 07458
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